Exploring the border traps near the valence band in the ${\mathrm{Si}\mathrm{O}}_{2}$-$\mathrm{Si}\mathrm{C}$ system using above-band-gap optical excitation (2024)

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  Figure 1

  Change in capacitance of the device $1300\times$ (see Table1 for sample details) as a function of time for an applied optical excitation for (a)–(c) the MOS capacitor and (d) the Schottky diode case. Panels (b),(c) show the rise and decay of the capacitance transient, respectively, for the MOS capacitor and illustrate the presence of a fast and a slow exponential component in the rise and decay. Results shown in (a)–(d) were performed with an LED. (e) Capacitance versus time under optical excitation using a laser with variable photon energy. Small increase in capacitance is observed during the OE experiment when $E_{\mathrm{photon}}<E_{\mathrm{g}}$. Increase in capacitance also persists after the laser is turned off. For $E_{\mathrm{photon}}>E_{\mathrm{g}}$, a rapid increase in capacitance is observed.

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  Figure 2

  Proposed model for the MOS capacitor to illustrate the generation, trapping, and recombination of charges under different operating conditions. Hole trapping at the border traps is proposed to be responsible for the rise in capacitance under the applied optical excitation.

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  Figure 3

  Parabolic approximation in the nonradiative multi-phonon (NMP) model to account for the deformation of the defect site. Upon optical excitation, the defect level can transform from State 01 (red parabola) into State 02 (black parabola). After optical excitation is removed, the barrier to transition from State 02 to State 01 is ${ϵ}_{21}$.

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  Figure 4

  (a) Rising capacitance of the $1300\times$ sample upon the application of optical excitation using an LED as a function of applied bias. Extracted time constant is shown as a function of gate bias (b) and temperature (c). (d) Dependence of the time constant on the optical power is illustrated. Measurement is performed at 293 K and 0-V dc bias.

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  Figure 5

  Hole-capture rate evaluated as $Q_{\mathrm{ox}}$ from Eq.(1) for the thermally oxidized and annealed samples (left, $1300\times$; middle, 1300NO1300; right, 1300Ar1300) during the OE experiment with a fixed temperature of 293 K and variable bias. It is observed that, for all the samples, the capture rate increases as a larger negative bias is applied to the MOS capacitors.

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  Figure 6

  (a) TCAD simulation of the oxide-semiconductor structure under varying gate bias. Inset, variation in the energy difference ($\mathrm{\Delta }E$) between a chosen defect level in the oxide and $E_{\mathrm{V}}$, depending on the gate bias. (b) CC diagram for the border traps. Although the energy difference between the defect level and $E_{\mathrm{V}}$ increases from $\mathrm{\Delta }{E}_1$ to $\mathrm{\Delta }{E}_2$ for increasing negative gate bias, the energy barrier for the transition from State 01 to 02 reduces from ${ϵ}_{12}$ to ${ϵ}_{12}^{\prime }$.

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  Figure 7

  (a) Representative example of the optical excitation experiment. (b) Capacitances $C_{\mathrm{init}}$, $C_{\max }$, and $C_{\mathrm{final}}$ are located on the $C$-$V$ curve, and corresponding voltages are extracted. (c) Using information about the initial and final capacitances and voltage, the concentrations of trapped positive charges in the oxide are calculated and shown as a function of applied gate bias for the three samples.

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  Figure 8

  Hole-capture rate evaluated for the thermally oxidized and annealed samples (left, $1300\times$; middle, 1300NO1300; right, 1300Ar1300) during the OE experiment with a fixed bias of 0 V and variable temperature. It is observed that the hole-capture process is fairly independent of temperature over the measured range.

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